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| DS2120 Ultra3 LVD SCSI Terminator www.maxim-ic.com FEATURES Fully compliant with Ultra3, Ultra160, Ultra320, and Ultra2 (LVD only) SCSI Provides low-voltage differential (LVD) termination for nine signal line pairs Zero-temperature coefficient-termination resistors Auto-select of LVD termination 5% tolerance on LVD termination resistance Low power-down capacitance of 3pF Built- in mode change filter/delay On-board thermal-shutdown circuitry SCSI bus hot-plug compatible PIN ASSIGNMENT VREF R1P R1N R2P R2N HS GND R3P R3N R4P R4N R5P R5N ISO GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 TPWR TPWR R9N R9P R8N R8P HS GND R7N R7P R6N R6P DIFF_CAP DIFFSENSE MSTR/SLV DS2120E 28-Pin TSSOP VREF NC NC R1P R1N R2P R2N HS GND HS GND HS GND R3P R3N R4P R4N R5P R5N ISO GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 TPWR NC LVD NC R9N R9P R8N R8P HS GND HS GND HS GND R7N R7P R6N R6P DIFF_CAP DIFFSENSE MSTR/SLV APPLICATIONS Raid Systems SCSI Host Bus Adapter Cards (HBA) Servers SCSI Cables Network Attached Storage (NAS) Storage Area Networks (SANs) ORDERING INFORMATION DS2120E DS2120B 28-Pin TSSOP 36-Pin SSOP 0C to +70C 0C to +70C DS2120B 36-Pin SSOP DESCRIPTION The DS2120 Ultra3 LVD SCSI terminator is a low-voltage differential (LVD) terminator. If the device is connected in an LVD-only bus, the DS2120 uses LVD termination. If any single-ended (SE) or highvoltage differential (HVD) devices are connected to the bus, the DS2120 disconnects from the bus. This is accomplished inside the part automatically by sensing the voltage on the SCSI bus DIFFSENS line. For the LVD termination, the DS2120 integrates two current sources with nine precision resistor strings. Three DS2120 terminators are needed for a wide SCSI bus. Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: http://dbserv.maxim-ic.com/errata.cfm. 1 of 10 042602 DS2120 REFERENCE DOCUMENTS Small Computer Systems Interface (SCSI-3) Small Computer Systems Interface (SCSI-3) Small Computer Systems Interface (SCSI-3) Small Computer Systems Interface (SCSI-3) SCSI Parallel Interface (SPI) SCSI Parallel Interface 2 (SPI-2) SCSI Parallel Interface 3 (SPI-3) SCSI Parallel Interface 4 (SPI-4) Project: 0855-M, 1995 Project: 1142-M, 1998 Project: 1302-D, 1999 Project: 1365-D, 200x Available from: American National Standards Institute (ANSI) Phone: 212-642-4900 Global Engineering Documents 15 Inverness Way East; Englewood, CO 80112 Phone: 800-854-7179 FUNCTIONAL DESCRIPTION The DS2120 combines LVD termination with DIFFSENSE sourcing and detection. LVD termination is provided by a laser-trimmed resistor biased with two current sources and a commonmode voltage source, generated from a bandgap reference of 1.25V. The configuration is a y-type terminator with a 105 differential and 150 common- mode resistance. A fail-safe bias of 112mV is maintained when no drivers are connected to the SCSI bus. In non-LVD mode, the resistors are isolated from the bus. The DIFF_CAP pin of DS2120 monitors the DIFFSENS line to determine the proper operating mode of the device. If the voltage on the DIFF_CAP is between 0.7V and 1.9V, the device enters LVD mode after the mode-change delay. If the voltage at the DIFF_CAP later crosses one of the thresholds, the DS2120 again changes modes after the mode-change delay. The mode-change delay is the same when changing in or out of LVD mode. A new mode change can start anytime after a previous mode change has been detected. These modes are the following: LVD Mode: LVD termination is provided by a precision laser-trimmed resistor string with two current sources. This configuration yields a 105 differential and 150 common- mode impedance. A fail- safe bias of 112mV is maintained when no drivers are connected to the SCSI bus. SE Isolation Mode: The DS2120 identifies that there is a SE (single-ended) device on the SCSI bus and isolates the termination pins from the bus. HVD Isolation Mode: The DS2120 identifies that there is an HVD device on the SCSI bus and isolates the termination pins from the bus. When ISO is pulled high, the termination pins are isolated from the SCSI bus and VREF remains active. The mode-change delay/filter is still active and the LVD pin continues to indicate the correct bus mode. During thermal shutdown, the termination pins are isolated from the SCSI bus and VREF becomes high impedance. The DIFFSENS driver is shut down during either of these two events. The DIFF_CAP receiver is disabled and the LVD goes low, indicating a non-LVD condition. To ensure proper operation, the TPWR pin should be connected to the SCSI bus TERMPWR line. As with all analo g circuitry, the TERMPWR and VDD lines should be bypassed locally. A 2.2F capacitor and a 0.01F high- frequency capacitor are recommended between TPWR and ground and placed as close as possible to the DS2120. The DS2120 should be placed as close as possible to the SCSI connector to minimize signal and power trace length, thereby lessening input capacitance and reflections that can degrade the bus signals. 2 of 10 DS2120 To maintain the specified regulation, a 4.7F capacitor is required between the VREF pin and ground of each DS2120. A high- frequency cap (0.1F ceramic recommended) can also be placed on the VREF pin in applications that use fast rise/fall- time drivers. A typical SCSI bus configuration is shown in Figure 2. DIFFSENS Noise Filtering: The DS2120 incorporates a digital filter to remove high- frequency transients on the DIFFSENS control line, thereby eliminating erroneous switching between modes. This filter eliminates the need for the external capacitor and resistor, which previously performed this function. The external filter can be used in addition to the digital filter if the DS2120 and DS2118M or DS2119M are to be used interchangeably. NOTES: 1) DIFFSENS: Refers to the SCSI bus signal. 2) DIFFSENSE: Refers to the Dallas Semiconductor pin name and internal circuitry relating to differential sensing. 3 of 10 DS2120 Figure 1. BLOCK DIAGRAM 2.15V DIFF CAP Mode Change Delay/Filter 0.6V 1.30V LVD DIFFSENSE THERMAL SHUTDOWN ISO MSTR/SLV CONTROL LOGIC R1N R1P I_GEN 2.15V REFERENCE GENERATOR 1.30V 0.6V R9N 1.25V R9P VREF 4 of 10 DS2120 Figure 2. SCSI BUS CONFIGURATION 5 of 10 DS2120 Table 1. PIN DESCRIPTION DS2120E 28-Pin TSSOP PIN 1 2-5, 7-12, 18-21, 23-26 6, 22 13 14 15 16 17 27, 28 NAME VREF RxP, RxN HS_GND ISO GND MSTR/SLV DIFFSENSE DIFF_CAP TPWR DESCRIPTION Regulator Output Voltage. 1.25V reference in LVD mode; must be decoupled with a 4.7F cap. Signal Termination. Connect to SCSI bus signal lines. Heat Sink Ground. Internally connected to the mounting pad. Should be connected to ground. Isolation. When pulled high, terminating resistors and biasing current sources are isolated from the SCSI bus. Signal Ground. Master/Slave. Mode select for the noncontrolling terminator. When pulled high (MSTR), the DIFFSENS driver is enabled. DIFFSENSE. Output to drive the SCSI bus DIFFSENS line. DIFFSENSE Capacitor. Connect a 0.1F capacitor for DIFFSENSE filter. Input to detect the type of device (differential or single -ended) on the SCSI bus. Termination Power. Connect to the SCSI TERMPWR line and decouple with 2.2F capacitor. DS2120B 36-Pin SSOP PIN 1 2, 3, 33, 35 4-7, 11-16, 22-25, 29-32 8-10, 26-28 17 18 19 20 21 34 36 NAME VREF NC RxP, RxN HS_GND ISO GND MSTR/SLV DIFFSENSE DIFF_CAP LVD TPWR DESCRIPTION Regulator Output Voltage. 1.25V reference in LVD mode; must be decoupled with a 4.7F cap. No Connect. Do not connect pins. Signal Termination. Connect to SCSI bus signal lines. Heat Sink Ground. Internally connected to the mounting pad. Should be connected to ground. Isolation. When pulled high, terminating resistors and biasing current sources are isolated from the SCSI bus. Signal Ground. Master/Slave. Mode select for the noncontrolling terminator. When pulled high (MSTR), the DIFFSENS driver is enabled. DIFFSENSE. Output to drive the SCSI bus DIFFSENS line. DIFFSENSE Capacitor. Connect a 0.1F capacitor for DIFFSENSE filter. Input to detect the type of device (differential or single ended) on the SCSI bus. Low-Voltage Differential. Output of DIFFSENSE receiver; output high indicates LVD bus operation . Termination Power. Connect to the SCSI TERMPWR line and decouple with 2.2F capacitor. 6 of 10 DS2120 RECOMMENDED OPERATING CONDITIONS PARAMETER Termpower Voltage, LVD Mode Logic 0 Logic 1 Operating Temperature SYMBOL VTPWR (LVD) VIL VIH VAMB MIN 2.7 -0.3 2.0 0 TYP MAX 5.5 +0.8 Vtpwr + 0.3 70 UNITS V V V C NOTES 13 13 LOW-VOLTAGE DIFFERENTIAL CHARACTERISTICS PARAMETER Differential Mode Termination Resistance Common Mode Termination Resistance Differential Mode Bias Common Mode Bias Output Capacitance Mode-Change Delay SYMBOL RDM RCM VDM VCM COUT MCD MIN 100 110 100 1.125 0.66 1.25 TYP MAX 110 190 125 1.375 3 2 UNITS ? ? mV V pF ms 2 1 1, 12 NOTES DC CHARACTERISTICS PARAMETER Termpower Current Input Leakage High Input Leakage Low Output Current High Output Current Low DIFF_CAP LVD Operating Range DIFFSENSE Driver Output Voltage DIFFSENSE Driver Source Current DIFFSENSE Driver Sink Current MSTR/SLV Input Leakage ISO Input Leakage Thermal Shutdown SYMBOL ITPMR IIH IIL IOH IOL VLVDOR VDSO IDSH IDSL IMSTRSLV IISO MIN -1.0 1.0 -1.0 4.0 0.7 1.2 5 20 -6.5 -125 150 1.9 1.4 15 200 +125 +6.5 TYP 12 MAX 30 UNITS mA A A mA mA V V mA A A A C 7, 8 7, 9, 11 7, 10, 11 NOTES 2, 3 14, 15 14, 15 4, 6 5, 6 7 of 10 DS2120 REGULATOR CHARACTERISTICS PARAMETER VREF Line Regulation VREF Load Regulation VREF Current Limit VREF Sink Current SYMBOL LIREG LOREG ILIM ISINK MIN TYP 1.0 1.3 MAX 2.0 3.5 200 200 UNITS % % mA mA NOTES NOTES: 1) Guaranteed by design. 2) All lines open. 3) ISO = 1 4) VOUT = 2.4V 5) VOUT = 0.4V 6) LVD pin only. 7) MSTR/SLV = 1 8) IDS = 0 to 5mA 9) VDSO = 0.0V 10) VDSO = 2.75V 11) TPWR = 5.5V 12) MCD is extended by the RC time constant formed by the resistor connected from DIFFSENSE to DIFF_CAP and the capacitor connected from DIFF_CAP to ground. 13) MSTR/SLV and ISO pins. 14) Terminator pins only. 15) DIFFCAP pin only. 8 of 10 DS2120 DS2120E 28-PIN TSSOP PACKAGE NOTES: 1) Dimension D does not include mold mismatch, flash, or protrusions. Mold mismatch, flash, and protrusions shall not exceed 0.15 per side. 2) Dimension B does not include dambar protrusion. Dambar protrusion shall not be located on the lower radius of the foot. DIM A A1 A2 c L e1 b D E1 E MIN MAX 1.10 0.05 0.75 1.05 0.09 0.20 0.50 0.75 0.65 BSC 0.18 0.30 9.60 9.80 4.40 BSC 6.20 6.60 Dimensions are in millimeters (mm). 9 of 10 DS2120 DS2120B 36-PIN SSOP PACKAGE NOTES: 1) Dimensions D and E1 include mold mismatch, but do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.254mm per side. 2) Section A dimensions apply to the flat section of the lead -A between 0.13mm to 0.25mm from the lead tip. 3) The chamfer on the body is optional. If it is not present, a visual index feature must be located within the cross-hatched area. DIM A A1 b c D E E1 e h L MIN MAX 2.44 2.64 0.12 0.29 0.43 0.23 0.32 15.20 15.54 10.11 10.52 7.40 7.60 0.80 BSC 0.25 0.71 0.51 1.02 Dimensions are in millimeters (mm). 10 of 10 |
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